In testing high density and high speed electrical devices such as LSI and VLSI circuits, a high performance probe contact system has to be used. The probe contact system typically includes a contact substrate (space transformer) having a large number of contactors or probe elements, a probe card for mounting the contact substrate, and a plurality of pogo-pins for connecting between the probe card and a test head of a semiconductor test system. The probe contact system interfaces between the test head of the semiconductor test system and semiconductor devices to test or burn-in IC chips, semiconductor wafers, printed circuit boards and the like.
In case where semiconductor devices to be tested are in the form of a semiconductor wafer, a semiconductor test system such as an IC tester is usually connected to substrate handler, such as an automatic wafer prober, to automatically test the semiconductor wafer. FIG. 1 shows an example of a combination of a semiconductor test system 10 and a wafer prober (substrate handler). The semiconductor test system 10 has a test head 100 which is ordinarily in a separate housing and electrically connected to the test system with a bundle of cables 110. The test head 100 and the substrate handler 400 are mechanically as well as electrically connected with each other with the aid of a manipulator 500 which is driven by a motor 510. The semiconductor wafers to be tested are automatically provided to a test position of the test head 100 by the substrate handler 400.
FIG. 2 shows the connection between the test system and the substrate handler in more detail. The test head 100 and the substrate handler 400 are connected through an interface component (probe contact system) 140 consisting of a performance board 120, signal cables 124 such as coaxial cables, a pin block structure including a pogo-pin block 130 and contact pins (pogo-pins) 141, a probe card (170) and contactors 190. The test head 100 includes a large number of printed circuit boards (pin cards) 150 which correspond to the number of test channels (pins) of the semiconductor test system. Each of the printed circuit boards 150 has a connector 160 to receive a corresponding contact terminal 121 of the performance board 120.
The pogo-pin block 130 is mounted on an upper surface of a frame (not shown) of the substrate handler 400. A large number of pogo-pins 141 are mounted on the pogo-pin block 130. As is well known in the art, a pogo-pin is a compressive contact pin having a spring therein. The pogo-pin block 130 is to accurately hold the pogo-pins 141 relative to the probe card 170 and the substrate handler 400. In the substrate handler 400, a semiconductor device, such as a semiconductor wafer 300 to be tested is mounted on a chuck 180.
Contact pads (electrodes) on the upper surface of the probe card 170 are electrically connected to the pogo-pins 141 when the pogo-pin block 130 is pressed against the probe card 170. Because each pogo-pin 141 is elastic in the longitudinal direction by the spring therein, it is able to overcome the planarization problem (unevenness of the surface flatness) involved in the probe card, wafer prober frames, or the like. The pogo-pins 141 are also connected to the contact terminals 121 of the performance board 120 through the coaxial cables 124 where each contact terminal 121 of the performance board 120 is connected to the printed circuit boards 150 of the test head 100. Further, the printed circuit boards 150 are connected to the semiconductor test system through the cable 110 having several hundreds of inner cables.
The probe contactors 190 mounted on the probe card 170 through a space transformer (not shown) contact with the surface (contact targets) of the semiconductor wafer 300 on the chuck 180 to apply test signals to the semiconductor wafer 300 and receive the resultant output signals from the semiconductor wafer 300. The resultant output signals from the wafer 300 under test are compared with the expected data generated by the semiconductor test system to determine whether the IC circuits on the semiconductor wafer 300 function correctly.
FIG. 3 is a cross sectional view showing an example of probe contact system formed with a pogo-pin block 130, a probe card 60, a space transformer (contact substrate) 50, and a contactor carrier 40. Typically, the contactor carrier 40 is provided with a large number of contactors 30. In the example of FIG. 3, the space transformer 50 is incorporated to fan-out the small pitch of the contactors 30 on the contactor carrier 40 to the large pitch of the contact pads 62 on the probe card 60. The space transformer 50 has a large number of inner patterns 52 and 54 to change the space (pitch) of the contactors 30. The space transformer 50 has many signal patterns and is made of, for example, multi-layers of ceramic substrate, and is costly.
Interconnect traces 63 of the probe card 60 further fans-out the pitch so that contact pads 65 of the probe card 60 can contact with pogo-pins 141 of the pogo-pin block 130.
FIG. 3 further shows a semiconductor wafer 300 having contact pads 320 thereon as contact targets. The pogo-pin block 130 and probe card 60 in FIG. 3 respectively correspond to the pogo-pin block 130 and probe card 60 in FIG. 2. Thus, the pogo-pin block 130 has a large number of pogo-pins (contact pins) 141 to interface between the probe card 60 and the performance board 120 (FIG. 2). At upper ends of the pogo-pins 141, cables 124 such as coaxial cables are connected to transmits signals to the printed circuit boards (pin cards) 150 in the test head 100 through the performance board 120.
As shown in FIG. 3, the carrier 40 is provided with plurality of contactors 30. The carrier 40 is so positioned over the contact targets such as contact pads 320 on a semiconductor wafer 300 to be tested that the contactors 30 establish electrical connections with the semiconductor wafer 300 when pressed against the other. Although only two contactors 30 are shown in FIG. 3, a large number, such as several hundreds or several thousands of contactors 30 are aligned on the carrier 40 in actual applications such as semiconductor wafer testing.
The contactor 30 in this example has a top contact portion protruding through the top surface of the carrier 40 to electrically connect with the contact pad of the space transformer 50, a body portion that is housed in the via hole of the carrier 40, a spring portion projected from the bottom surface of the carrier 40 and bent to produce a resilient contact force when pressed against the contact target, and a bottom contact portion that establishes electrical contact with the contact targets 320 on the wafer 300. The contactors 30 can be made through a semiconductor production process including, for example, photolithography and electroplating process on a silicon substrate.
When the semiconductor wafer 300 moves upward, the contactors 30 and the contact targets 320 on the wafer 300 mechanically and electrically contact with each other. Consequently, a signal path is established from the contact target 320 to test head of the semiconductor test system through the contactors 30 on the contactor carrier 40, pads and interconnect trace 54 of the space transformer 50, contact pads 62, 65, and interconnect trace 63 on the probe card 60, and pogo-pin block 130.
In the foregoing conventional example, to establish electrical connection with the contact pads of the semiconductor wafer, the probe contact system having many components has to be used, resulting in high cost. Since the semiconductor industry is under the continued demands of improving performances per cost, it is necessary to decrease the test cost involved in testing the semiconductor devices. Under the circumstances, there is a need in the industry to incorporate a simpler and more economical way to form a probe contact system for a semiconductor test system.